偶用374模擬并口方式和計(jì)算機(jī)通信，芯片用DSPIC的現(xiàn)在程序遇到點(diǎn)麻煩，讀寫時(shí)序沖突，當(dāng)WR為低時(shí)，RD也有低電平，打電話后按你們的方式做還是有讀寫沖突，而且和網(wǎng)上帖子給我的關(guān)于時(shí)序的處理方法的 建議（hcn給的）有出入，特把程序貼出來，望幫忙看看：： D端口有12個(gè)引腳，低8位數(shù)據(jù)連374并口，高4位連信號線！ #define CH374_DATA_DAT_OUT（d） (LATD=(LATD&&0XFF00)+d)//數(shù)據(jù)輸出 #define CH374_DATA_DAT_IN（） (LATD&&0X00FF)//數(shù)據(jù)輸出 #define CH374_DATA_DIR_OUT（） (TRISD&=0X0000)//設(shè)置口為輸出 #define CH374_DATA_DIR_IN（） (TRISD|=0X00FF)//設(shè)置口為輸入 [ 1] WRITE374indeX( UINT8mindex) { //DSP復(fù)位后引腳能輸出高電平 CH374_RD=1; CH374_DATA_DIR_OUT（）; CH374_DATA_DAT_OUT（d）; ch374_A0=1; CH374_CS=0; CH374_WR=0; mDelayus(1);//125ns CH374_WR=1; CH374_CS=0; CH374_DATA_DIR_IN（）; ch374_A0=0; } //=========================================================================== [2] WRITE374DATA( UINT8 mdata) { CH374_RD=1; CH374_DATA_DIR_OUT（）;//設(shè)置為輸出 CH374_DATA_DAT_OUT（d）;//輸出數(shù)據(jù) ch374_A0=0; CH374_CS=0; CH374_WR=0; mDelayus(1);//125ns CH374_WR=1; CH374_CS=0; CH374_DATA_DIR_IN（）; //ch374_A0=1; } //++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++ [3] READ374DATA(VOID) { UINT8 mDATA; //CH374_WR=1; CH374_DATA_DIR_IN（）; CH374_A0=0; CH374_CS=0; CH374_RD=0; mDelayus(1);//125ns mDATA=CH374_DATA_DAT_IN（）; CH374_RD=1; CH374_CS=1; } 這是按照你們的提示做的，示波器上WR/RD信號有沖突，374的指示燈亮，PC沒有發(fā)現(xiàn)未知硬件提示！沒有用4通道測CS/A0？？？？？ 謝謝---------------------！
[b]文字[/b]