我現(xiàn)在使用CH32V307RCT6,想實(shí)現(xiàn)TIM1和TIM2的同步計(jì)數(shù)以及pwm輸出,現(xiàn)在正在寫同步計(jì)數(shù)的部分代碼,但是一直無(wú)法實(shí)現(xiàn)功能,特此請(qǐng)教。
代碼如下
#include?"debug.h" void?TIM1_Init(void)?{ ????RCC_APB2PeriphClockCmd(RCC_APB2Periph_TIM1,?ENABLE); ????TIM_TimeBaseInitTypeDef?TIM_TimeBaseStructure; ????TIM_TimeBaseStructure.TIM_Period?=?999; ????TIM_TimeBaseStructure.TIM_Prescaler?=?71; ????TIM_TimeBaseStructure.TIM_ClockDivision?=?TIM_CKD_DIV1; ????TIM_TimeBaseStructure.TIM_CounterMode?=?TIM_CounterMode_Up; ????TIM_TimeBaseInit(TIM1,?&TIM_TimeBaseStructure); ????TIM_SelectOutputTrigger(TIM1,?TIM_TRGOSource_Update); ????TIM_Cmd(TIM1,?ENABLE); } void?TIM2_Init(void)?{ ????RCC_APB1PeriphClockCmd(RCC_APB1Periph_TIM2,?ENABLE); ????TIM_TimeBaseInitTypeDef?TIM_TimeBaseStructure; ????TIM_TimeBaseStructure.TIM_Period?=?999; ????TIM_TimeBaseStructure.TIM_Prescaler?=?71; ????TIM_TimeBaseStructure.TIM_ClockDivision?=?TIM_CKD_DIV1; ????TIM_TimeBaseStructure.TIM_CounterMode?=?TIM_CounterMode_Up; ????TIM_TimeBaseInit(TIM2,?&TIM_TimeBaseStructure); ????TIM_SelectSlaveMode(TIM2,?TIM_SlaveMode_External1); ????TIM_SelectInputTrigger(TIM2,?TIM_TS_ITR0); ????TIM_Cmd(TIM2,?ENABLE); } int?main(void)?{ ????NVIC_PriorityGroupConfig(NVIC_PriorityGroup_2); ????SystemCoreClockUpdate(); ????Delay_Init(); ????USART_Printf_Init(921600); ????printf("SystemClk:%d\r\n",SystemCoreClock); ????printf(?"ChipID:%08x\r\n",?DBGMCU_GetCHIPID()?); ????TIM1_Init(); ????TIM2_Init(); ????while?(1)?{ ????????printf("TIM1?Counter:?%d,?TIM2?Counter:?%d\n",?TIM_GetCounter(TIM1),?TIM_GetCounter(TIM2)); ????????Delay_Ms(100); ????} }
這樣打印出來(lái)的counter值看起來(lái)差距很大,應(yīng)該的沒同步上,我應(yīng)該如何修改代碼。
[2024/07/11?10:27:51.797]?→?TIM1?Counter:?681,?TIM2?Counter:?1? TIM1?Counter:?531,?TIM2?Counter:?2? [2024/07/11?10:27:51.906]?→?TIM1?Counter:?381,?TIM2?Counter:?2? [2024/07/11?10:27:51.999]?→?TIM1?Counter:?231,?TIM2?Counter:?2? [2024/07/11?10:27:52.109]?→?TIM1?Counter:?81,?TIM2?Counter:?2? [2024/07/11?10:27:52.203]?→?TIM1?Counter:?907,?TIM2?Counter:?2? [2024/07/11?10:27:52.312]?→?TIM1?Counter:?757,?TIM2?Counter:?2? [2024/07/11?10:27:52.404]?→?TIM1?Counter:?607,?TIM2?Counter:?2? [2024/07/11?10:27:52.512]?→?TIM1?Counter:?457,?TIM2?Counter:?2? [2024/07/11?10:27:52.608]?→?TIM1?Counter:?307,?TIM2?Counter:?3? [2024/07/11?10:27:52.700]?→?TIM1?Counter:?157,?TIM2?Counter:?3? [2024/07/11?10:27:52.808]?→?TIM1?Counter:?7,?TIM2?Counter:?3? [2024/07/11?10:27:52.903]?→?TIM1?Counter:?807,?TIM2?Counter:?3? [2024/07/11?10:27:53.013]?→?TIM1?Counter:?657,?TIM2?Counter:?3? [2024/07/11?10:27:53.104]?→?TIM1?Counter:?507,?TIM2?Counter:?3? [2024/07/11?10:27:53.213]?→?TIM1?Counter:?357,?TIM2?Counter:?3? [2024/07/11?10:27:53.306]?→?TIM1?Counter:?207,?TIM2?Counter:?3? [2024/07/11?10:27:53.415]?→?TIM1?Counter:?57,?TIM2?Counter:?4? [2024/07/11?10:27:53.509]?→?TIM1?Counter:?883,?TIM2?Counter:?4? [2024/07/11?10:27:53.618]?→?TIM1?Counter:?733,?TIM2?Counter:?4? [2024/07/11?10:27:53.712]?→?TIM1?Counter:?583,?TIM2?Counter:?4? [2024/07/11?10:27:53.806]?→?TIM1?Counter:?433,?TIM2?Counter:?4? [2024/07/11?10:27:53.916]?→?TIM1?Counter:?283,?TIM2?Counter:?4? [2024/07/11?10:27:54.008]?→?TIM1?Counter:?133,?TIM2?Counter:?4? [2024/07/11?10:27:54.117]?→?TIM1?Counter:?983,?TIM2?Counter:?4? [2024/07/11?10:27:54.210]?→?TIM1?Counter:?833,?TIM2?Counter:?5?